
recode:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004006b8 <_init>:
  4006b8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4006bc:	910003fd 	mov	x29, sp
  4006c0:	94000052 	bl	400808 <call_weak_fn>
  4006c4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4006c8:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006d0 <.plt>:
  4006d0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006d4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf484>
  4006d8:	f947fe11 	ldr	x17, [x16, #4088]
  4006dc:	913fe210 	add	x16, x16, #0xff8
  4006e0:	d61f0220 	br	x17
  4006e4:	d503201f 	nop
  4006e8:	d503201f 	nop
  4006ec:	d503201f 	nop

00000000004006f0 <perror@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4006f4:	f9400211 	ldr	x17, [x16]
  4006f8:	91000210 	add	x16, x16, #0x0
  4006fc:	d61f0220 	br	x17

0000000000400700 <fclose@plt>:
  400700:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400704:	f9400611 	ldr	x17, [x16, #8]
  400708:	91002210 	add	x16, x16, #0x8
  40070c:	d61f0220 	br	x17

0000000000400710 <fopen@plt>:
  400710:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400714:	f9400a11 	ldr	x17, [x16, #16]
  400718:	91004210 	add	x16, x16, #0x10
  40071c:	d61f0220 	br	x17

0000000000400720 <open@plt>:
  400720:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400724:	f9400e11 	ldr	x17, [x16, #24]
  400728:	91006210 	add	x16, x16, #0x18
  40072c:	d61f0220 	br	x17

0000000000400730 <__libc_start_main@plt>:
  400730:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400734:	f9401211 	ldr	x17, [x16, #32]
  400738:	91008210 	add	x16, x16, #0x20
  40073c:	d61f0220 	br	x17

0000000000400740 <close@plt>:
  400740:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400744:	f9401611 	ldr	x17, [x16, #40]
  400748:	9100a210 	add	x16, x16, #0x28
  40074c:	d61f0220 	br	x17

0000000000400750 <__gmon_start__@plt>:
  400750:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400754:	f9401a11 	ldr	x17, [x16, #48]
  400758:	9100c210 	add	x16, x16, #0x30
  40075c:	d61f0220 	br	x17

0000000000400760 <abort@plt>:
  400760:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400764:	f9401e11 	ldr	x17, [x16, #56]
  400768:	9100e210 	add	x16, x16, #0x38
  40076c:	d61f0220 	br	x17

0000000000400770 <puts@plt>:
  400770:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400774:	f9402211 	ldr	x17, [x16, #64]
  400778:	91010210 	add	x16, x16, #0x40
  40077c:	d61f0220 	br	x17

0000000000400780 <fwrite@plt>:
  400780:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400784:	f9402611 	ldr	x17, [x16, #72]
  400788:	91012210 	add	x16, x16, #0x48
  40078c:	d61f0220 	br	x17

0000000000400790 <fflush@plt>:
  400790:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400794:	f9402a11 	ldr	x17, [x16, #80]
  400798:	91014210 	add	x16, x16, #0x50
  40079c:	d61f0220 	br	x17

00000000004007a0 <read@plt>:
  4007a0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4007a4:	f9402e11 	ldr	x17, [x16, #88]
  4007a8:	91016210 	add	x16, x16, #0x58
  4007ac:	d61f0220 	br	x17

00000000004007b0 <printf@plt>:
  4007b0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4007b4:	f9403211 	ldr	x17, [x16, #96]
  4007b8:	91018210 	add	x16, x16, #0x60
  4007bc:	d61f0220 	br	x17

Disassembly of section .text:

00000000004007c0 <_start>:
  4007c0:	d280001d 	mov	x29, #0x0                   	// #0
  4007c4:	d280001e 	mov	x30, #0x0                   	// #0
  4007c8:	aa0003e5 	mov	x5, x0
  4007cc:	f94003e1 	ldr	x1, [sp]
  4007d0:	910023e2 	add	x2, sp, #0x8
  4007d4:	910003e6 	mov	x6, sp
  4007d8:	580000c0 	ldr	x0, 4007f0 <_start+0x30>
  4007dc:	580000e3 	ldr	x3, 4007f8 <_start+0x38>
  4007e0:	58000104 	ldr	x4, 400800 <_start+0x40>
  4007e4:	97ffffd3 	bl	400730 <__libc_start_main@plt>
  4007e8:	97ffffde 	bl	400760 <abort@plt>
  4007ec:	00000000 	.inst	0x00000000 ; undefined
  4007f0:	00400930 	.word	0x00400930
  4007f4:	00000000 	.word	0x00000000
  4007f8:	00400a48 	.word	0x00400a48
  4007fc:	00000000 	.word	0x00000000
  400800:	00400ac8 	.word	0x00400ac8
  400804:	00000000 	.word	0x00000000

0000000000400808 <call_weak_fn>:
  400808:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf484>
  40080c:	f947f000 	ldr	x0, [x0, #4064]
  400810:	b4000040 	cbz	x0, 400818 <call_weak_fn+0x10>
  400814:	17ffffcf 	b	400750 <__gmon_start__@plt>
  400818:	d65f03c0 	ret
  40081c:	00000000 	.inst	0x00000000 ; undefined

0000000000400820 <deregister_tm_clones>:
  400820:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400824:	9101e000 	add	x0, x0, #0x78
  400828:	b0000081 	adrp	x1, 411000 <perror@GLIBC_2.17>
  40082c:	9101e021 	add	x1, x1, #0x78
  400830:	eb00003f 	cmp	x1, x0
  400834:	540000a0 	b.eq	400848 <deregister_tm_clones+0x28>  // b.none
  400838:	90000001 	adrp	x1, 400000 <_init-0x6b8>
  40083c:	f9457421 	ldr	x1, [x1, #2792]
  400840:	b4000041 	cbz	x1, 400848 <deregister_tm_clones+0x28>
  400844:	d61f0020 	br	x1
  400848:	d65f03c0 	ret
  40084c:	d503201f 	nop

0000000000400850 <register_tm_clones>:
  400850:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400854:	9101e000 	add	x0, x0, #0x78
  400858:	b0000081 	adrp	x1, 411000 <perror@GLIBC_2.17>
  40085c:	9101e021 	add	x1, x1, #0x78
  400860:	cb000021 	sub	x1, x1, x0
  400864:	9343fc21 	asr	x1, x1, #3
  400868:	8b41fc21 	add	x1, x1, x1, lsr #63
  40086c:	9341fc21 	asr	x1, x1, #1
  400870:	b40000a1 	cbz	x1, 400884 <register_tm_clones+0x34>
  400874:	90000002 	adrp	x2, 400000 <_init-0x6b8>
  400878:	f9457842 	ldr	x2, [x2, #2800]
  40087c:	b4000042 	cbz	x2, 400884 <register_tm_clones+0x34>
  400880:	d61f0040 	br	x2
  400884:	d65f03c0 	ret

0000000000400888 <__do_global_dtors_aux>:
  400888:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40088c:	910003fd 	mov	x29, sp
  400890:	f9000bf3 	str	x19, [sp, #16]
  400894:	b0000093 	adrp	x19, 411000 <perror@GLIBC_2.17>
  400898:	3941e260 	ldrb	w0, [x19, #120]
  40089c:	35000080 	cbnz	w0, 4008ac <__do_global_dtors_aux+0x24>
  4008a0:	97ffffe0 	bl	400820 <deregister_tm_clones>
  4008a4:	52800020 	mov	w0, #0x1                   	// #1
  4008a8:	3901e260 	strb	w0, [x19, #120]
  4008ac:	f9400bf3 	ldr	x19, [sp, #16]
  4008b0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008b4:	d65f03c0 	ret

00000000004008b8 <frame_dummy>:
  4008b8:	17ffffe6 	b	400850 <register_tm_clones>

00000000004008bc <audio_open>:
  4008bc:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008c0:	910003fd 	mov	x29, sp
  4008c4:	f9000fa0 	str	x0, [x29, #24]
  4008c8:	f9000ba1 	str	x1, [x29, #16]
  4008cc:	f9400ba0 	ldr	x0, [x29, #16]
  4008d0:	f100001f 	cmp	x0, #0x0
  4008d4:	54000081 	b.ne	4008e4 <audio_open+0x28>  // b.any
  4008d8:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  4008dc:	912be000 	add	x0, x0, #0xaf8
  4008e0:	f9000ba0 	str	x0, [x29, #16]
  4008e4:	52800001 	mov	w1, #0x0                   	// #0
  4008e8:	f9400ba0 	ldr	x0, [x29, #16]
  4008ec:	97ffff8d 	bl	400720 <open@plt>
  4008f0:	2a0003e1 	mov	w1, w0
  4008f4:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4008f8:	91020000 	add	x0, x0, #0x80
  4008fc:	b9000001 	str	w1, [x0]
  400900:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400904:	91020000 	add	x0, x0, #0x80
  400908:	b9400000 	ldr	w0, [x0]
  40090c:	7100001f 	cmp	w0, #0x0
  400910:	540000aa 	b.ge	400924 <audio_open+0x68>  // b.tcont
  400914:	f9400ba0 	ldr	x0, [x29, #16]
  400918:	97ffff76 	bl	4006f0 <perror@plt>
  40091c:	12800000 	mov	w0, #0xffffffff            	// #-1
  400920:	14000002 	b	400928 <audio_open+0x6c>
  400924:	12800000 	mov	w0, #0xffffffff            	// #-1
  400928:	a8c27bfd 	ldp	x29, x30, [sp], #32
  40092c:	d65f03c0 	ret

0000000000400930 <main>:
  400930:	d14013ff 	sub	sp, sp, #0x4, lsl #12
  400934:	a9007bfd 	stp	x29, x30, [sp]
  400938:	910003fd 	mov	x29, sp
  40093c:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  400940:	912be001 	add	x1, x0, #0xaf8
  400944:	910043a0 	add	x0, x29, #0x10
  400948:	97ffffdd 	bl	4008bc <audio_open>
  40094c:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  400950:	912c2001 	add	x1, x0, #0xb08
  400954:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  400958:	912c4000 	add	x0, x0, #0xb10
  40095c:	97ffff6d 	bl	400710 <fopen@plt>
  400960:	f91ffba0 	str	x0, [x29, #16368]
  400964:	f95ffba0 	ldr	x0, [x29, #16368]
  400968:	f100001f 	cmp	x0, #0x0
  40096c:	54000081 	b.ne	40097c <main+0x4c>  // b.any
  400970:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  400974:	912c8000 	add	x0, x0, #0xb20
  400978:	97ffff7e 	bl	400770 <puts@plt>
  40097c:	b93fffbf 	str	wzr, [x29, #16380]
  400980:	14000025 	b	400a14 <main+0xe4>
  400984:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  400988:	912ce000 	add	x0, x0, #0xb38
  40098c:	97ffff79 	bl	400770 <puts@plt>
  400990:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400994:	91020000 	add	x0, x0, #0x80
  400998:	b9400003 	ldr	w3, [x0]
  40099c:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4009a0:	91022000 	add	x0, x0, #0x88
  4009a4:	d283fc82 	mov	x2, #0x1fe4                	// #8164
  4009a8:	aa0003e1 	mov	x1, x0
  4009ac:	2a0303e0 	mov	w0, w3
  4009b0:	97ffff7c 	bl	4007a0 <read@plt>
  4009b4:	b93fefa0 	str	w0, [x29, #16364]
  4009b8:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  4009bc:	912d2000 	add	x0, x0, #0xb48
  4009c0:	b97fefa1 	ldr	w1, [x29, #16364]
  4009c4:	97ffff7b 	bl	4007b0 <printf@plt>
  4009c8:	b97fefa1 	ldr	w1, [x29, #16364]
  4009cc:	5283fc80 	mov	w0, #0x1fe4                	// #8164
  4009d0:	6b00003f 	cmp	w1, w0
  4009d4:	54000080 	b.eq	4009e4 <main+0xb4>  // b.none
  4009d8:	90000000 	adrp	x0, 400000 <_init-0x6b8>
  4009dc:	912d8000 	add	x0, x0, #0xb60
  4009e0:	97ffff44 	bl	4006f0 <perror@plt>
  4009e4:	b9bfefa1 	ldrsw	x1, [x29, #16364]
  4009e8:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4009ec:	91022000 	add	x0, x0, #0x88
  4009f0:	f95ffba3 	ldr	x3, [x29, #16368]
  4009f4:	aa0103e2 	mov	x2, x1
  4009f8:	d2800021 	mov	x1, #0x1                   	// #1
  4009fc:	97ffff61 	bl	400780 <fwrite@plt>
  400a00:	f95ffba0 	ldr	x0, [x29, #16368]
  400a04:	97ffff63 	bl	400790 <fflush@plt>
  400a08:	b97fffa0 	ldr	w0, [x29, #16380]
  400a0c:	11000400 	add	w0, w0, #0x1
  400a10:	b93fffa0 	str	w0, [x29, #16380]
  400a14:	b97fffa0 	ldr	w0, [x29, #16380]
  400a18:	7100741f 	cmp	w0, #0x1d
  400a1c:	54fffb4d 	b.le	400984 <main+0x54>
  400a20:	f95ffba0 	ldr	x0, [x29, #16368]
  400a24:	97ffff37 	bl	400700 <fclose@plt>
  400a28:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400a2c:	91020000 	add	x0, x0, #0x80
  400a30:	b9400000 	ldr	w0, [x0]
  400a34:	97ffff43 	bl	400740 <close@plt>
  400a38:	52800000 	mov	w0, #0x0                   	// #0
  400a3c:	a9407bfd 	ldp	x29, x30, [sp]
  400a40:	914013ff 	add	sp, sp, #0x4, lsl #12
  400a44:	d65f03c0 	ret

0000000000400a48 <__libc_csu_init>:
  400a48:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400a4c:	910003fd 	mov	x29, sp
  400a50:	a901d7f4 	stp	x20, x21, [sp, #24]
  400a54:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf484>
  400a58:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf484>
  400a5c:	91374294 	add	x20, x20, #0xdd0
  400a60:	913722b5 	add	x21, x21, #0xdc8
  400a64:	a902dff6 	stp	x22, x23, [sp, #40]
  400a68:	cb150294 	sub	x20, x20, x21
  400a6c:	f9001ff8 	str	x24, [sp, #56]
  400a70:	2a0003f6 	mov	w22, w0
  400a74:	aa0103f7 	mov	x23, x1
  400a78:	9343fe94 	asr	x20, x20, #3
  400a7c:	aa0203f8 	mov	x24, x2
  400a80:	97ffff0e 	bl	4006b8 <_init>
  400a84:	b4000194 	cbz	x20, 400ab4 <__libc_csu_init+0x6c>
  400a88:	f9000bb3 	str	x19, [x29, #16]
  400a8c:	d2800013 	mov	x19, #0x0                   	// #0
  400a90:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400a94:	aa1803e2 	mov	x2, x24
  400a98:	aa1703e1 	mov	x1, x23
  400a9c:	2a1603e0 	mov	w0, w22
  400aa0:	91000673 	add	x19, x19, #0x1
  400aa4:	d63f0060 	blr	x3
  400aa8:	eb13029f 	cmp	x20, x19
  400aac:	54ffff21 	b.ne	400a90 <__libc_csu_init+0x48>  // b.any
  400ab0:	f9400bb3 	ldr	x19, [x29, #16]
  400ab4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400ab8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400abc:	f9401ff8 	ldr	x24, [sp, #56]
  400ac0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ac4:	d65f03c0 	ret

0000000000400ac8 <__libc_csu_fini>:
  400ac8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400acc <_fini>:
  400acc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400ad0:	910003fd 	mov	x29, sp
  400ad4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400ad8:	d65f03c0 	ret
